In wireline communications, a received signal may be distorted due to intersymbol interference (ISI) from the signal channels. ISI results from dielectric losses and frequency-dependent signal losses (due to the skin effect) that occur along the transmission medium (e.g., printed circuit board (PCB) microstrips, cables, coaxial connecters, and so on). ISI typically causes significant eye jitter, which makes it more difficult for a receiver to synchronize in a manner that results in reliable clock and data recovery.
In some wireline receivers, adaptive equalization circuits (or “equalizers”) are implemented to compensate for ISI. An equalizer receives an ISI-distorted signal from the transmission medium, and attempts to compensate for losses over the signal bandwidth, in order to reduce the eye jitter to an acceptable level. More particularly, an equalizer has a gain-versus-frequency transfer function which, ideally, is an inverse of the gain (loss)-versus-frequency characteristic of the signal channel. Accordingly, the equalizer may compensate for the loss imparted by the signal channel by applying appropriate gains to the received signal across the signal bandwidth. Because the loss characteristics of a channel tend to increase as the transmission frequency increases, a well designed equalizer should have higher gain-versus-frequency slope characteristics at higher frequencies.
Although traditional equalizers designed for lower-frequency transmissions have adequately compensated for ISI at those lower frequencies, these equalizers were not designed to perform robustly for the higher frequency communications that are becoming increasingly more prevalent and desired. Accordingly, most traditional equalizers are not capable of adequately compensating for higher ISI inherent in increasingly higher frequency communications.
Some more contemporary equalizer designs have attempted to tackle ISI issues inherent in higher-frequency communications. For example, some newer equalizers include multiple branches of cascaded “differentiator circuits” to composite an equalizer. However, the capacitive parasitic of the multi-parallel stages limits the high-speed capacity. In addition, these equalizers typically use many gain stages, which significantly increase a receiver's power consumption, particularly at high frequencies. Other undesirable effects also may be inherent in some new equalizer designs (e.g., inadequate or inconsistent gain over the bandwidth of interest, sensitive AC gain response, frequency limitations, and so on). Accordingly, designers continue to strive to develop relatively low-power, adaptive equalization circuits that can provide adequate ISI compensation at increasingly higher transmission frequencies.